Homework_6 -- Using Design Flow Scripts for Flex and Virtex

Homework_6 -- Using Design Flow Scripts for Flex and Virtex

Background Material:
Design Entry and Control

Text on WAIT and ASSERT Statements

Example WAIT and ASSERT Statements

hw6a-demo-commands

Timer_tester.vhd

Part A: Seq_Generator
Tutorial Targeting Flex & Virtex (restricted pdf)

Part B: Timer
Using Asserts (restricted pdf)

hdl2graphics (restricted pdf)

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