12:40 p.m.-1:55 p.m. in 510 Ferris Hall
| Session | Date | Topic |
| 01 | 08/23/Thu | Course Overview; Microelectronic Systems Design |
| 02 | 08/28/Tue | Describe HW1; Remote Access; Role of Synthesis |
| 03 | 08/30/Thu | HDL Languages; Describe HW2 (GUI and CLI) |
| 04 | 09/04/Tue | VHDL for Combinational Logic |
| 05 | 09/06/Thu | VHDL for Controllers |
| 06 | 09/11/Tue | Structural VHDL |
| 07 | 09/13/Thu | Design Methodology |
| 08 | 09/18/Tue | Describe HW3 |
| 09 | 09/20/Thu | VHDL Examples; Describe HW4 |
| 10 | 09/25/Tue | FPGA Floorplans & Interconnect |
| 11 | 09/27/Thu | Physical Place & Route |
| 12 | 10/02/Tue | HDL2Graphics; Graphics2HDL |
| 13 | 10/04/Thu | Testbenches; Describe HW6 |
| 14 | 10/09/Tue | No Class (miss# 1) |
| -- | 10/11/Thu | No Class (Fall Break) |
| 15 | 10/16/Tue | Project Descriptions and Assignments |
| 16 | 10/18/Thu | Creating and Integrating IP Blocks |
| 17 | 10/23/Tue | No Class (miss# 2) |
| 18 | 10/25/Thu | Digital Systems Verification (Prof. Peterson) |
| 19 | 10/30/Tue | High-Performance Switch Fabrics (Prof. Elhanany) |
| 20 | 11/01/Thu | Retargeting and Migration |
| 21 | 11/06/Tue | Reconfigurable Computing |
| 22 | 11/08/Thu | Need for Test |
| 23 | 11/13/Tue | Designing Testable ICs |
| 24 | 11/15/Thu | Platform Design |
| 25 | 11/20/Tue | No Class (miss# 3) |
| -- | 11/22/Thu | No Class (Thanksgiving) |
| 26 | 11/27/Tue | Global Design |
| 27 | 11/29/Thu | Group Presentations |
| 28 | 12/04/Tue | Group Presentations |
| 29 | 12/05/Wed | Project Checkoffs; Reports Due |
| 30a | 12/05/Wed | Final Exam #1 (9-11 am -- optional) |
| 30b | 12/11/Tue | Final Exam #2 (12:30 pm--2:30 pm -- reqd) |