FPGA Design Using Graphical Tools



Part A: LabView

National Instruments LabView FPGA

The following exercise (zip) uses LabView to implement both an adder and a subtractor in parallel on an FPGA.

The LabView FPGA software and hardware are installed on eight machines in 508 Ferris Hall (9am-6pm M-F).

To download a free 30-day evaluation copy of LabView to your own PC, access: http://www.ni.com
and search for "LabVIEW 8.20 Evaluation Software Download"

Capture screen shots of the Tick Count when executing the adder alone
and when executing both the adder and subtractor in parallel.

LabView FPGA Tutorial (16-page pdf; restricted access)

For technical assistance with LabView, contact Muhammad Sharafa at msharafa@utk.edu

Part A2: 2008 LabView

Muhammad Sharafat -- Apr 28, 2007
LabView_PWM_Generator Tutorial (16-page pdf; restricted access)
PeriodCounter.zip


Motor_Contrl_Demo (2-min video-wmv)
MotorSpeedController.zip

Lego MindStorms

Part B: SysGen

Xilinx SysGen

Read the following tutorial to learn some of the features of SysGen.

SygGen Tutorial (23-page pdf; restricted access)

Part C: Synplify DSP

Synplicity Synplify_DSP

View the Online Demo for DSP Synthesis.

Link your results to your restricted webpage.

Update /usr/cad/public_html/552hw_status.html