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TITLE: Low-Cost Structured ASIC with Zero Mask Charges
LSI Logic Corp. offers a $6 RapidChip Integrator2 Platform ASIC
with zero mask charges and only $50K for non-recurring
engineering charges when customers order 100,000 or more parts.
The RapidChip Integrator2 slices are being offered in 0.5M gates
of logic/0.9 megabits of embedded Matrix RAM and 0.85M gates of
logic/1.5 megabits of embedded Matrix RAM configurations.This
structured ASIC is the most cost-efficient implementation for
many industrial, medical, defense and high-end consumer
applications. An evaluation version of the LSI Logic RapidWorx
tool kit and the Amplify RapidChip physical synthesis tool,
jointly developed with Synplicity, are being provided to
designers at no additional fee.
For additional information, access: RapidChip
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FILENUMBER: 1212
BEGIN_KEYWORDS
Structured ASIC Zero Mask Charges
END_KEYWORDS
DATE: June 2005
TITLE: Low-Cost Structured ASIC with Zero Mask Charges
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