Abstract

This project involves the design, simulation and implementation of the popular memory game, Simon. The game will be designed using structural and behavioral descriptions of various modules which will be coded using VHDL. Simulation and testing for each module will be realized through test benches. Upon successful simulation the design will be implemented for Altera and Xilinx FPGAs and physically downloaded onto the Altera test board.

Introduction

A detailed design process will be utilized to ensure that all requirements are met for the specific application described in this proposal. This process is illustrated in Figure 1.

For the project, VHDL will describe the structural and behavioral elements of the design. These elements will be broken down into logical modules that can be separately developed and tested. Test benches will be created to fully exercise the functionality of each module. Test bench results will verify proper operation and timing before any synthesis occurs.

After synthesis the design could potentially be implemented on multiple technologies, however, we will use the Altera test board to manifest the project physically. The placement and routing will be done automatically through the use of the Mentor Graphics software suite.

Figure 1 – Design Process

System Specifications

The system will provide the functionality of the popular memory game Simon. In single player operation, the processor will light a random LED for a short period of time. The user will then have to press a push button corresponding to the LED that was illuminated. The processor will then repeat the existing LED sequence and add one LED. After each step the user will have to press the push buttons in order that correspond to the each LED in the sequence. Failure to correctly repeat the sequence ends the game. The system includes dip switches to reset program operation and initiate the built in self-test. Seven segment LEDs will be used to provide information about the game state. These messages include player turn and score. The seven segment LEDs will also be used to indicate that the system is in self-test mode. Potential additions to the system include a two player mode, sound, and a difficulty level setting.

Figure 2 – System Level Diagram

ASIC Specifications

The design consists of seven functional blocks, each of which performs a particular task. Figure 3 describes the various modules inside the ASIC and their interconnections. The main module is a state machine and coordinates the input and output operations and handles most of the processing logic. The input module conditions the push button input and sends the user input to the main module. The conditioning consists of debouncing and converting the signal to a single pulse. The memory module stores the current LED sequence and score. This information is provided to the main module. The game status module takes input from the dip switches and provides this initial state information to the main module. The clock module takes the external 25 MHz clock and converts it into the frequencies needed for the input module, output timing of lights and general logic timing for the main module. The output module receives information from the main module and lights the appropriate LEDs and seven segment displays. The built in self test module sends signals to the output and after initial LED tests, allows user input on push buttons which lights its corresponding LED.

Figure 3 – ASIC Modules and I/O

Contents

Abstract

Introduction

System Specifications

ASIC Specifications